Incorporated by reference herein is my U.S. Pat. No. 5,528,174, entitled "Devices for Implementing Microwave Phase Logic," which issued Jun. 18, 1996 and is assigned to the same assignee as the present invention. This patent is directed to the use of respective microwave devices employing doubly-balanced mixers that implement each of various microwave phase logic (MPL) functions that make use of biphase encoding. Specifically, these MPL functions include those of a phase regenerator, a memory element for a biphase-encoded signal, a sample-and-hold circuit for temporarily storing the binary value represented by a transient biphase-encoded signal, an EXCLUSIVE OR circuit, and a FULL ADDER circuit.
Further, as brought out in this patent, it would be very difficult to design a baseband digital-information handling system that employs prior-art logic devices using D.C. amplitude pulse and RF pulse binary encoding for a signal that starts at or near D.C. and extends to microwave with a multi-gigahertz bandwidth. However, a multi-gigahertz bandwidth (e.g., up to 5 GHz) would be a moderate percentage of a relatively high continuous microwave carrier frequency (e.g., 40 GHz) that employs biphase encoding.